Architecture of a low-complexity non-binary LDPC decoder for high order fields

ISCIT 2007 - 2007 International Symposium on Communications and Information Technologies Proceedings

Volumn , Issue , 2007, Pages 1201-1206

  Voicila, Adrian ^a   Verdier, François ^a   Declercq, David ^a   Fossorier, Marc ^b   Urard, Pascal ^c  

^a Centre national de la recherche scientifique   (France)

^b University of Hawaii at Manoa   (United States)

^c STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; CODES (STANDARDS); CODES (SYMBOLS); COMPUTATIONAL METHODS; COMPUTER SIMULATION; ERROR ANALYSIS; ERROR COMPENSATION; HARDWARE; INFORMATION TECHNOLOGY; ITERATIVE DECODING; MAGNETIC PROPERTIES; MAGNETIC SUSCEPTIBILITY; PROGRAMMING THEORY;

(ALGORITHMIC) COMPLEXITY; CODING SYSTEMS; COMPLEXITY REDUCTION; DECODING ALGORITHMS; DECODING ITERATIONS; ERROR DECODING; FRAME ERROR RATE (FER); HARDWARE COMPLEXITIES; HARDWARE IMPLEMENTATIONS; HIGH ORDER; INTERNATIONAL SYMPOSIUM; LDPC DECODERS; LOW-COMPLEXITY; LOW-COMPLEXITY ALGORITHMS; METRICS (CO); NON BINARY; PUNCTURED LOW DENSITY PARITY CHECK (LDPC) CODES; SUPERIOR PERFORMANCE;

DECODING;

EID: 46749088740     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCIT.2007.4392200     Document Type: Conference Paper

References (15)

1. D.J.C. Mackay and R.M. Neal, "Near shannon limit performance of low density parity check codes," Elect. Lett., vol. 33, no. 6, pp. 457-458, Mar. 1997.
2. T.J. Richardson, M.A. Shokrollahi and R.L. Urbanke, "Design of Capacity-Approaching Low-Density Parity Check Codes" IEEE Trans. Inform. Theory, vol.47, pp.619-637, Feb. 2001
3. M. Davey and D.J.C. MacKay, "Low Density Parity Check Codes over GF(q)," IEEE Commun. Lett., vol. 2, pp. 165-167, June 1998.
4. q) Codes," The Proc. IEEE Intern. Conf. on Commun., Paris, France, pp. 528-532, June 2004.
5. A. Bennatan and D. Burshtein, "Design and Analysis of Nonbinary LDPC Codes for Arbitrary Discrete-Memoryless Channels," IEEE Trans. on Inform. Theory, vol. 52, no. 2, pp. 549-583, Feb. 2006.
6. X.-Y. Hu, E. Eleftheriou and D.-M. Arnold, "Progressive edge-growth Tanner graphs," The Proc. GLOBECOM, San Antonio, Texas, USA, Nov. 2001.
7. D. Declercq and M. Fossorier, "Decoding Algorithms for Nonbinary LDPC Codes over GF(ç)", IEEE Trans. on Comm., vol. 55, pp. 633-643, April 2007.
8. H. Wymeersch, H. Steendam and M. Moeneclaey, "Log-Domain Decoding of LDPC Codes over GF(q)," The Proc. IEEE Intern. Conf. on Commun., pp. 772-776, Paris, France, June 2004
9. H. Song and J.R. Cruz, "Reduced-Complexity Decoding of Q-ary LDPC Codes for Magnetic Recording," IEEE Trans. Magn., vol. 39, pp. 1081-1087, Mar. 2003.
10. A. Voicila, D. Declercq, F. Verdier, M. Fossorier and P. Urard, "Low Complexity, low memory EMS algorithm for non-binary LDPC codes," In Proc. ICC, Glasgow, UK, June 2007.
11. L. Ping and W.K. Leung, "Decoding low density parity check codes with finite quantization bits", IEEE Commun. Lett., pp.62-64, Feb. 2000.
12. C. Paar. "A new architecture for a parallel finite fild multiplier with low complexity bas ed on composite fields," IEEE Trans. on Computers, vol. 45(7), pp. 856-861, July 1996
13. H. Wymeersch, H. Steendam and M. Moeneclaey, "Computational complexity and quantization effects of decoding algorithms of LDPC codes over GF(q)," In Proc. ICASSP, Montreal, Canada, May 2004
14. T. Zhang, Z. Wang and K.K. Pahri "On finite precision implementation of low parity check codes" In Proc. ISCAS, Sydney, Australia, May 2001
15. S.Y. Chung, T. Richardson, and R. Urbanke, "Analysis of Sum-Product Decoding of LDPC Codes using a Gaussian Approximation", IEEE Trans. Inf. Theory, 47:657-670, Feb. 2001.