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Volumn , Issue , 2007, Pages 19-
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Logic diagnosis and yield learning
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Author keywords
[No Author keywords available]
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Indexed keywords
COST EFFECTIVENESS;
DATA COMPRESSION;
DATA PROCESSING;
DATA STORAGE EQUIPMENT;
DIGITAL SIGNAL PROCESSING;
EDUCATION;
ELECTRON TUBES;
FUZZY LOGIC;
HEALTH;
INSPECTION;
INTEGRATED CIRCUIT TESTING;
KETONES;
LITHOGRAPHY;
MECHANISMS;
NETWORKS (CIRCUITS);
QUALITY ASSURANCE;
RELIABILITY;
SAFETY FACTOR;
SENSITIVITY ANALYSIS;
STRESS CORROSION CRACKING;
TESTING;
(100) SILICON;
(ALGORITHMIC) COMPLEXITY;
(E ,3E) PROCESS;
DEFECTIVE CHIPS;
DESIGN FOR MANUFACTURE (DFM);
ELECTRONIC CIRCUITS;
FAILURE MECHANISMS;
FAILURE RATES;
IN LINE INSPECTION (ILI);
IN LINE INSPECTION DATA;
LITHOGRAPHY SIMULATIONS;
LOG DATA;
MANUFACTURING TESTING;
NEW APPROACHES;
NEW PROCESSES;
NEW SOLUTIONS;
POST-PROCESSING;
PROCESSING TIMES;
PRODUCTION ENVIRONMENTS;
SENSITIVITY FUNCTIONS;
SMALL SAMPLES;
SUB-WAVELENGTH LITHOGRAPHY;
TEST CHIPS;
TEST COMPRESSION;
TEST DATA;
VOLUME DIAGNOSIS;
YIELD LEARNING;
YIELD LOSSES;
FAILURE ANALYSIS;
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EID: 46449130381
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/DDECS.2007.4295248 Document Type: Conference Paper |
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Times cited : (3)
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References (0)
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