Virtual prototyping of universal control architecture systems by means of processor in the loop technology

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2007, Pages 21-27

  Francis, G ^a   Burgos, R ^a   Rodriguez, P ^a,c   Wang, F ^a   Boroyevich, D ^a   Liu, R ^b   Monti, A ^b  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

^b University of South Carolina   (United States)

^c UNIVERSITAT INTERNACIONAL DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CONTROL SYSTEMS; CONTROL SYSTEM SYNTHESIS; CONTROL THEORY; DIGITAL ARITHMETIC; DIGITAL CONTROL SYSTEMS; EQUIPMENT TESTING; EXHIBITIONS; INTERFACES (COMPUTER); MILITARY DATA PROCESSING; PHASE INTERFACES; PNEUMATIC CONTROL EQUIPMENT; POWER ELECTRONICS; SOFTWARE PROTOTYPING; TECHNOLOGY;

(OTDR) TECHNOLOGY; APPLIED (CO); AS-INTERFACE (AS-I); DESIGN METHODOLOGIES; DIGITAL CONTROLLERS; DIGITAL CONTROLS; ELECTRONICS APPLICATIONS; HOST COMPUTERS; PERIPHERAL COMPONENT INTERCONNECT (PCI) BUS; POWER STAGES; SIMULATION STRATEGIES; SYNTHESIS (OF CHIRAL IONIC LIQUIDS); UNIVERSAL CONTROL; VIRTUAL PROTOTYPING (VP); VIRTUAL TEST BED (VTB);

CONTROL SYSTEMS;

EID: 46449096030     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEX.2007.357491     Document Type: Conference Paper

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