Synthesis of open reactive systems from scenario-based specifications

Fundamenta Informaticae

Volumn 62, Issue 2, 2004, Pages 139-169

  Bontemps, Yves ^a   Schobbens, Pierre Yves ^a   Löding, Christof ^b  

^a UNIVERSITY OF NAMUR   (Belgium)

^b RWTH AACHEN UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AUTOMATION; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER PROGRAMMING; FEEDBACK; GAME THEORY; MATHEMATICAL MODELS; POLYNOMIALS; PROBLEM SOLVING; SOFTWARE ENGINEERING;

LIVE SEQUENCE CHARTS (LSC); MESSAGE SEQUENCE CHARTS (MSC); OPEN REACTIVE SYSTEMS; SYSTEM UNDER DEVELOPMENT (SUD);

SEMANTICS;

EID: 4644317319     PISSN: 01692968     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (62)

1. Abadi, M., Lamport, L.: Composing Specifications, ACM Transactions on Programming Languages and Systems, 15(1), January 1993, 73-132.
2. Abadi, M., Lamport, L., Wolper, P.: Realizable and Unrealizable Specifications of Reactive Systems, Automata, Languages and Programming, 16th International Colloquium, ICALP89, Stresa, Italy, July 11-15, 1989, Proceedings (G. Ausiello, M. Dezani-Ciancaglini, S. R. D. Rocca, Eds.), 372, Springer, 1989, ISBN 3-540-51371-X.
3. de Alfaro, L., Henzinger, T. A., Stoelinga, M.: Timed Interfaces, Proc. of EMSOFT 2002, Second International Workshop on Embedded Software (A. Sangiovanni-Vincentelli, J. Sifakis, Eds.), 2491, Springer, Grenoble, France, October 2002.
4. Alpern, B., Schneider, F. B.: Defining Liveness, Information Processing Letters, 21(4), October 1985, 181-185, ISSN 0020-0190.
5. Alur, R., Etessami, K., Yannakakis, M.: Inference of Message Sequence Charts, Proceedings of 22nd International Conference on Software Engineering, 2000.
6. Alur, R., Henzinger, T. A., Kupferman, O.: Alternating-time temporal logic, Journal of the ACM (JACM),7 49(5), 2002, 672-713, ISSN 0004-5411.
7. Amyot, D., Eberlein, A.: An Evaluation of Scenario Notations for Telecommunication Systems Development, Proc. of 9th Int. Conference on Telecommunication Systems (9ICTS), Dallas, USA, March 2001.
8. Antoniotti, M.: Synthesis and verification of discrete controllers for robotics and manufacturing devices with temporal logic and the Control-D system, Ph.D. Thesis, New York University, New York, 1995.
9. Berry, G.: The Foundations of ESTEREL, in: Proof, Language and Interaction: Essays in Honour of Robin Milner (G. Plotkin, C. Stirling, M. Tofte, Eds.), MIT Press, 1998.
10. Biermann, A. W., Krishnaswamy,R.: Constructing Programs from Example Computations, IEEE Transactions on Software Engineering (TSE), SE-2(3), September 1976, 141-153.
11. Bontemps, Y.: Automated Verification of State-based Specifications Against Scenarios (A Step towards Relating Inter-Object to Intra-Object Specifications), Master Thesis, University of Namur, rue Grandgagnage, 21 - 5000 Namur(Belgium), June 2001.
12. Bontemps, Y.: Realizability of Scenario-based Specifications, Diplôme d'études approfondies, Facultés Universitaires Notre-Dame de la Paix, Institut d'Informatique (University of Namur, Computer Science Dept), rue Grandgagnage, 21, B5000 - Namur (Belgium), September 2003.
13. Büchi, J., Landweber, L. H.: Solving sequential conditions finite-state strategies, Trans. Amen. Math. Soc., 138, 1969, 295-311.
14. Church, A.: Logic, arithmetic and automata, Proc. of Intern. Cong. Math, 1963.
15. Cobben, J., Engels, A., Mauw, S., Reniers, A., M.: Formal Semantics of Message Sequence Charts (ITU-T Recommendation Z.120 Annex B), International Telecommunication Union, Eindhoven, The Netherlands, April 1998, http://www.itu.int.
16. Damm, W., Harel, D.: LSCs: Breathing Life into Message Sequence Charts, Formal Methods in System Design, 19(1), 2001, 45-80.
17. Desforges, P.: Industrialisation of the B method, La lettre B, 1(1), Nov 1996.
18. Desharnais, J., Frappier, M., Khédri, R., Mili, A.: Integration of Sequential Scenarios, IEEE Transactions on Software Engineering, 24(9), September 1998, 695-708.
19. Diethelm, I., Geiger, L., Maier, T., Zündorf, A.: Turning Collaboration Diagram Strips into Storycharts, Proc. of "Scenarios and State-Machines: models, algorithms and tools" (SCESM) workshop of the 24th Int. Conf. on Software Engineering (ICSE 2002), ACM, Orlando, FL, May 2002, http://www.cs.tut.fi/~tsysta/ICSE/papers/.
20. Dwyer, M. B., Avrunin, G. S., Corbett, J. C.: Patterns in Property Specifications for Finite-State Verification, Proceedings of the 21st International Conference on Software Engineering, ACM, May 1999.
21. Emerson, E. A., Clarke, E. M.: Using branching time temporal logic to synthesize synchronization skeletons, Science of Computer Programming, 2(3), December 1982, 241-266, ISSN 0167-6423.
22. Finkbeiner, B., Krüger, I. H.: Using Message Sequence Charts for Component-based Formal Verification, Proc. of OOPSLA 2001 Workshop on Specification and Verification of Component-Based Systems, Tampa Bay, FL, USA, October 2001.
23. Grädel, E., Thomas, W., Wilke, T., Eds.: Automata Logics, and Infinite Games: A Guide to Current Research, vol. 2500 of Lect. Notes in Comp. Sci., Springer, November 2002, ISBN 3-540-00388-6.
24. Harel, D., Kugler, H.: Synthesizing State-Based Object Systems from LSC Specifications, International Journal of Foundations of Computer Science, 13(1), February 2002, 5-51, (Preliminary version appeared in, Proc. Fifth Int. Conf. on Implementation and Application of Automata (CIAA 2000), LNCS 2088, July 2000.).
25. Harel, D., Kugler, H.: Synthesizing State-Based Object Systems from LSC Specifications, International Journal of Foundations of Computer Science, 13(1), February 2002, 5-51, (Preliminary version appeared in, Proc. Fifth Int. Conf. on Implementation and Application of Automata (CIAA 2000), LNCS 2088, July 2000.).
26. th Intl. Conference on Formal Methods in Computer-Aided Design (FMCAD'02), Portland, Oregon, 2002, To appear. Also available as Tech. Report MCS02-08, The Weizmann Institute of Science.
27. th Intl. Conference on Formal Methods in Computer-Aided Design (FMCAD'02), Portland, Oregon, 2002, To appear. Also available as Tech. Report MCS02-08, The Weizmann Institute of Science.
28. Harel, D., Marelly, R.: Come, let's play! Scenario-based programming using LSCs and the Play-engine, Springer, 2003, ISBN 3-540-00787-3.
29. Harel, D., Politi, M.: Modeling Reactive Systems with Statecharts: the STATEMATE Approach, McGraw-Hill, 1998, ISBN 0-070-26205-5.
30. Hsia, P., Samuel, J., Gao, J., Kund, D., Toyoshima, Y., Chen, C.: Formal Approach to Scenario Analysis, IEEE journal, March 1994, 33-41.
31. Huber, F., Schätz, B., Einert, G.: Consistent Graphical Specification of Distributed Systems, FME '97: Industrial Applications and Strengthened Foundations of Formal Methods, 4th International Symposium of Formal Methods Europe, Graz, Austria, September 15-19, 1997, Proceedings (J. S. Fitzgerald, C. B. Jones, P. Lucas, Eds.), 1313, Springer, 1997, ISBN 3-540-63533-5.
32. MSC-2000: ITU-T Recommendation Z.I20: Message Sequence Chart (MSC), 2000, http://www.itu.int/.
33. Jacobson, I.: Object Oriented Software Engineering: a Use-Case Driven Approach, ACM Press/Addison-Wesley, 1992.
34. Klose, J., Wittke, H.: An Automata Based Interpretation of Live Sequence Charts, Proc. of TACAS (Tools and Algorithms for the Construction and Analysis of Systems) 2001 (T. Margaria, W. Yi, Eds.), 2031, Springer-Verlag, Genova, Italy, April 2001.
35. Koskimies, K., Männistö, T., Systä, T., Tuomi, J.: SCED: A Tool for Dynamic Modelling of Object Systems, Technical Report Report A-1996-4, Department of Computer Science, University of Tampere, University of Tampere, Department of Computer Science, P.O. Box 607, FIN-33101 Tampere, Finland, July 1996, ISBN 951-44-4003-X, ISSN 0783-6910.
36. Krüger, I., Grosu, R., Scholz, P., Broy, M.: From MSCs to Statecharts, Kluwer Academic Publishers, 1999, Franz J. Rammig (ed.).
37. Kupferman, O., Vardi, M. Y.: Synthesizing distributed Systems, Proc. 16th IEEE Symp. on Logic in Computer Science, July 2001.
38. Kupferman, O., Vardi, M. Y., Wolper, P.: Module Checking, Information and Computation, 164, 2001, 322-344.
39. Lamouchi, H. M., Thistle, J. G.: Effective control synthesis for DES under partial observations, Proc. 39th IEEE Conference on Decision and Control (Session on Discrete Event Systems), IEEE, Sidney, Australia, December 2000.
40. Li, Y., Wonham, W.: On supervisory control of real-time discrete-event systems, Information Sciences, 46(3), 1988, 159-183.
41. Madhusudhan, P., Thiagarajan, P.: A Decidable Class of Asynchronous Distributed Controllers, Proc. of CONCUR'02, 2421, Springer, Brno, Czech Republic, 2002.
42. Manna, Z., Wolper, P.: Synthesis of Communicating Processes from Temporal Logic Specifications, ACM Transactions on Programming Languages and Systems (TOPLAS), 6(1), 1984, 68-93, ISSN 0164-0925.
43. Martin, D. A.: Borel Determinacy, Annals of Mathematics, 102, 1975, 363-371.
44. Object Management Group (UML Revision Task Force): OMG UML Specification (2,0), September 2003, http://www.omg.org/uml.
45. Pnueli, A., Rosner, R.: On the Synthesis of a Reactive Module, Proceedings of the sixteenth annual ACM symposium on Principles of programming languages, 1989, ISBN 0-89791-294-2.
46. Puri, A., Tripakis, S., Varaiya, P.: Problems and Examples of Decentralized Observation and Control for Discrete Event Systems, in: Synthesis and Control of Discrete Event Systems (B. Caillaud, P. Darondeau, L. Lavagno, X. Xie, Eds.), Kluwer Academic Publisher, January 2002, ISBN 0-7923-7639-0.
47. Ramadge, P. J. G., Wonham, W. M.: The Control of Discrete Event Systems, Proceedings of the IEEE; Special issue on Dynamics of Discrete Event Systems, 77, 1, 1989, 81-98.
48. Rosner, R.: Modular Synthesis of Reactive Systems, Ph.D. Thesis, The Weizmann Institute of Science, Rehovot, Israel, April 1992.
49. Safra, S.: On the complexity of ω-automata, 29th annual Symposium on Foundations of Computer Science, October 24-26, 1988, White Plains, New York (IEEE, Ed.), IEEE Computer Society Press, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, USA, 1988, ISBN 0-8186-0877-3 (paperback), 0-8186-4877-5 (microfiche), 0-8186-8877-7 (hard).
50. Thistle, J. G.: Supervisory Control of Discrete Event Systems, Mathl. Comput. Modelling, 23(11/12), 1996, 25-53.
51. Thistle, J. G., Malhamé, R. P.: Control of ω-automata under state fairness assumptions, Systems and Controls Letters, 33, 1998, 265-274.
52. Thistle, J. G., Wonham, W. M.: Control of infinite behavior of finite automata, SIAM J. Control and Optimization, 32(4), July 1994, 1075-1097.
53. Thistle, J. G., Wonham, W. M.: Supervision of infinite behavior of discrete-event systems, SIAM J. Control and Optimization, 32(4), July 1994, 1098-1113.
54. Thomas, W.: Infinite games and verification, Proceedings of the International Conference on Computer Aided Verification (CAV'02), 2404, Springer, 2002.
55. Tripakis, S.: Undecidable problems of decentralized observation and control on regular languages, Information Processing Letters, 90, 2004, 21-28.
56. Uchitel, S., Kramer, J.: A Workbench for Synthesizing Behaviour Models from Scenarios, Proc. of the 23rd IEEE International Conference on Software Engineering (ICSE'01), ACM, 2001.
57. Uchitel, S., Kramer, J., Magee, L: Detecting Implied Scenarios in Message Sequence Chart Specifications, Proceedings of the Joint 8th European Software Engeneering Conference and 9th ACM SIGSOFT Symposium on the Foundation of Software Engeneering (ESEC/FSE-01) (V. Gruhn, Ed.), 26, 5, ACM Press, New York, September 10-142001, ISSN 0163-5948.
58. Vardi, M. Y.: An automata-theoretic approach to fair realizability and synthesis, Proceedings of the 7th International Conference On Computer Aided Verification (P. Wolper, Ed.), 939, Springer Verlag, Liege, Belgium, 1995.
59. Vöge, J., Jurdziński, M.: A Discrete Strategy Improvement Algorithm for Solving Parity Games (Extended Abstract), Computer Aided Verification, 12th International Conference, CAV2000, Proceedings (E. A. Emerson, A. P. Sistla, Eds.), 1855, Springer, Chicago, IL, USA, July 2000.
60. Weidenhaupt, K., Pohl, K., Jarke, M., Haumer, P.: Scenario Usage in System Development: A Report on Current Practice, IEEE Software, 15(2), March 1998, 34-45.
61. Whittle, J., Schumann, J.: Generating Statechart Designs from Scenarios, 22ndInternational Conference on Software Engineering (ICSE2000), ACM, Limerick, Ireland, June 2000.
62. Wong-Toi, H., Dill, D. L.: Synthesizing Processes and Schedulers from Temporal Specifications, Computer-Aided Verification '90: Proceedings of a DIMACS Workshop (E. M. Clarke, R. P. Kurshan, Eds.), 3, American Mathematical Society, 1991.