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Volumn , Issue , 2006, Pages 541-546

Executing hardware tasks on dynamically reconfigurable devices under real-time conditions

Author keywords

[No Author keywords available]

Indexed keywords

(I ,J) CONDITIONS; DEVICE CONFIGURATIONS; FIELD PROGRAMMABLE LOGIC (FPL); INTERNATIONAL CONFERENCES; LIGHT WEIGHTING; PROTOTYPE SYSTEMS; REAL-TIME TASKS; RECONFIGURABLE DEVICES; RECONFIGURATION TIME; RUN TIME SYSTEM (RTS); SCHEDULABILITY ANALYSIS; SYNTHESIS TOOLS;

EID: 46249113817     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2006.311264     Document Type: Conference Paper
Times cited : (18)

References (8)
  • 3
    • 0035338121 scopus 로고    scopus 로고
    • Optimization of Dynamic Hardware Reconfigurations
    • May
    • J. Teich, S. Fekete, and J. Schepers, "Optimization of Dynamic Hardware Reconfigurations," The J. of Supercomputing, vol. 19, no. 1, pp. 57-75, May 2000.
    • (2000) The J. of Supercomputing , vol.19 , Issue.1 , pp. 57-75
    • Teich, J.1    Fekete, S.2    Schepers, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.