Microprocessor power analysis by labeled simulation

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2001, Pages 182-189

  Hsieh, Cheng Ta ^a   Chen, Lung Sheng ^a   Pedram, Massoud ^a  

^a Univ of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELL LIBRARY; CYCLE-ACCURATE SIMULATION; DIGITAL SIGNALS; INSTRUCTION-LEVEL; PIPELINED PROCESSOR; POWER ANALYSIS; SUPERSCALAR; VERILOG SIMULATOR;

EXHIBITIONS; SIGNAL PROCESSING;

APPLICATION PROGRAMS;

EID: 46249102434     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2001.915022     Document Type: Conference Paper

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3. th Design Automation Conference, pages 340-345, Jun. 2000.
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