SMT(CLU): A step toward scalability in system verification

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2006, Pages 844-851

  Sheini, Hossein M ^a   Sakallah, Karem A ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

(E ,2E) THEORY; ARITHMETIC LOGIC; COMPUTER-AIDED DESIGN; EQUIVALENCE CHECKING; FORMAL VERIFICATIONS; GENERAL (CO); HARDWARE DESIGNS; HARDWARE VERIFICATION; INPUT AND OUTPUT (I/O); INTERNATIONAL CONFERENCES; MODEL CHECKERS; MODULO THEORIES; SAT SOLVER (SIM); SATISFIABILITY (QSAT); SYSTEM VERIFICATIONS; UNINTERPRETED FUNCTIONS; WIDE-RANGE;

DESCRIBING FUNCTIONS; DESIGN; FORMAL LOGIC; FUZZY LOGIC; MODEL CHECKING; SEPARATION; SPEECH TRANSMISSION; SURFACE MOUNT TECHNOLOGY;

BOOLEAN FUNCTIONS;

EID: 46149106618     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320088     Document Type: Conference Paper

References (23)

1. E. M. Clarke and E. A. Emerson, "Design and synthesis of synchronization skeletons using branching-time temporal logic," in Logic of Programs, Workshop. London, UK: Springer-Verlag, 1982, pp. 52-71.
2. E. M. Clarke, O. Grumberg, S. Jha, Y. Lu, and H. Veith, "Counterexample-guided abstraction refinement," in Conference on Computer Aided Verification, 2000, pp. 154-169.
3. E. M. Clarke, O. Grumberg, M. Talupur, and D. Wang, "Making predicate abstraction efficient: How to eliminate redundant predicates." in Conference on Computer Aided Verification, 2003, pp. 126-140.
4. Z. S. Andraus, M. H. Liffiton, and K. A. Sakallah, "Refinement strategies for verification methods based on datapath abstraction," in ASP-DAC '06: Asia South Pacific design automation, 2006, pp. 19-24.
5. R. E. Bryant, S. K. Lahiri, and S. A. Seshia, "Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions," in Proceedings of the 14th International Conference on Computer Aided Verification, 2002, pp. 78-92.
6. S. K. Lahiri, S. A. Seshia, and R. E. Bryant, "Modeling and verification of out-of-order microprocessors in UCLID," in FMCAD, 2002, pp. 142-159.
7. V. Ganapathy, S. A. Seshia, S. Jha, T. W. Reps, and R. E. Bryant, "Automatic discovery of API-level exploits," in ICSE, May 2005, pp. 312-321.
8. C. Tinelli, "A DPLL-based calculus for ground satisfiability modulo theories," in Proceedings of the 8th European Conference on Logics in Artificial Intelligence, 2002, pp. 308-319.
9. R. E. Bryant, S. K. Lahiri, and S. A. Seshia, "Deciding CLU logic formulas via Boolean and pseudo-Boolean encodings," in Proc. Intl. Workshop on Constraints in Formal Verification, 2002.
10. M. Bozzano, R. Bruttomesso, A. Cimatti, T. Junttila, P. van Rossum, S. Schulz, and R. Sebastiani, "An incremental and layered procedure for the satisfiability of linear arithmetic logic." in TACAS, 2005, pp. 317-333.
11. H. Ganzinger, G. Hagen, R. Nieuwenhuis, A. Oliveras, and C. Tinelli, "DPLL(T): Fast decision procedures," in CAV, 2004, pp. 175-188.
12. H. M. Sheini and K. A. Sakallah, "A SAT-based decision procedure for mixed logical/integer linear problems." in CPAIOR, 2005, pp. 320-335.
13. R. Nieuwenhuis and A. Oliveras, "DPLL(T) with exhaustive theory propagation and its application to difference logic." in Conference on Computer Aided Verification, 2005, pp. 321-334.
14. N. Eén and N. Sörensson, "An extensible SAT-solver." in SAT, 2003, pp. 502-518.
15. S. A. Seshia, S. K. Lahiri, and R. E. Bryant, "A hybrid SAT-based decision procedure for separation logic with uninterpreted functions," in DAC. New York, NY, USA: ACM Press, 2003, pp. 425-430.
16. W. Ackermann, "Solvable cases of the decision problem," in Studies in Logic and the Foundations of Mathematics. North-Holland, 1954.
17. R. Nieuwenhuis and A. Oliveras, "Decision procedures for SAT, SAT modulo theories and beyond. the BarcelogicTools." in Conf. Logic for Programming, Artificial Intelligecne and Reasoning, 2005, pp. 23-46.
18. -, "Proof-Producing Congruence Closure," in Proceedings of the 16th Int'l Conf. on Term Rewriting and Applications, 2005, pp. 453-468.
19. C. W. Barrett and S. Berezin, "CVCLite: A new implementation of the cooperating validity checker category b." in CAV, 2004, pp. 515-518.
20. P. Marques-Silva and K. A. Sakallah, "GRASP: A search algorithm for propositional satisfiability," IEEE Trans. Comput., vol. 48, no. 5, pp. 506-521, 1999.
21. J. Jaffar, M. J. Maher, P. J. Stuckey, and R. H. C. Yap, "Beyond finite domains," in Workshop on Principles and Practice of Constraint Programming, 1994, pp. 86-94.
22. P. Manolios and S. K. Srinivasan, "A parameterized benchmark suite of hard pipelined-machine-verification problems." in CIIARME, 2005, pp. 363-366.
23. L. de Moura, "Yices", 2005. [Online]. Available: http://fm.csl.sri.com/yices/