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Volumn , Issue , 2006, Pages 443-447

Thermal characterization and optimization in platform FPGAs

Author keywords

Placement; Platform FPGAs; Temperature; Thermal; Virtex4

Indexed keywords

DESIGN; DIES; FABRICS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); THERMOANALYSIS;

EID: 46149089208     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320154     Document Type: Conference Paper
Times cited : (23)

References (17)
  • 12
    • 85009352442 scopus 로고    scopus 로고
    • K. Skadron, M. R. Stan, et al., Temperature-Aware Microarchitecture: Modeling and Implementation, In ACM Transactions on Architecture and Code Optimization. 1, No. 1, Mar- 2004, Pages 94-125.
    • K. Skadron, M. R. Stan, et al., "Temperature-Aware Microarchitecture: Modeling and Implementation," In ACM Transactions on Architecture and Code Optimization. Vol. 1, No. 1, Mar- 2004, Pages 94-125.
  • 13
    • 36349013071 scopus 로고    scopus 로고
    • Designing for Power Budgets and Effective Thermal Management
    • A. Telikepalli, "Designing for Power Budgets and Effective Thermal Management," In Xcell Journal. Issue 56, 2006. (http://www.xilinx.com/ publications/xcellonline/xcell_56)
    • (2006) In Xcell Journal , Issue.56
    • Telikepalli, A.1
  • 17
    • 46149106989 scopus 로고    scopus 로고
    • S. Lopez-Buedo and J. Garrido, 'Making Visible the Thermal Behavior of Embedded Microprocessors on FPGAs: a Progress Report, In Proceedings of International Symposium on Field-programmable gate arrays, 2004.
    • S. Lopez-Buedo and J. Garrido, 'Making Visible the Thermal Behavior of Embedded Microprocessors on FPGAs: a Progress Report," In Proceedings of International Symposium on Field-programmable gate arrays, 2004.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.