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Volumn , Issue , 2003, Pages 150-155

Influence of back-end architectures on the performance of RF CMOS VCOs

Author keywords

Aluminum; Artificial intelligence; CMOS technology; Costs; Phase noise; Q factor; Radio frequency; Space technology; Thin film inductors; Voltage controlled oscillators

Indexed keywords

ALUMINUM; ARTIFICIAL INTELLIGENCE; CIRCUIT OSCILLATIONS; CMOS INTEGRATED CIRCUITS; COSTS; OSCILLISTORS; PHASE NOISE; Q FACTOR MEASUREMENT; SILICON WAFERS; VARIABLE FREQUENCY OSCILLATORS;

EID: 4544371641     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SSMSD.2003.1190415     Document Type: Conference Paper
Times cited : (2)

References (11)
  • 1
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    • Multilayer Thin-Film MCM-D for the Integration of High-Performance RF and Microwave Circuits
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    • Carchon, G.1
  • 3
    • 0036450056 scopus 로고    scopus 로고
    • High-Q inductors on low resistivity silicon through wafer post-processing
    • presented at September 4-6
    • G. Carchon, et al., "High-Q inductors on low resistivity silicon through wafer post-processing," presented at IMAPS, Denver, CO, pp. 604-609, September 4-6, 2002.
    • (2002) IMAPS, Denver, CO , pp. 604-609
    • Carchon, G.1
  • 4
    • 84907680859 scopus 로고    scopus 로고
    • RF potential of High performance 100nm CMOS technology
    • V.C. Venezia, et al., "RF potential of High performance 100nm CMOS technology", Proc. of ESSDERC 2002, pp. 491-494.
    • Proc. of ESSDERC 2002 , pp. 491-494
    • Venezia, V.C.1
  • 5
    • 0036541802 scopus 로고    scopus 로고
    • Ad-on Cu/SiLK™ Module for High Q Inductors
    • April
    • S.Jenei, et al.,"Ad-on Cu/SiLK™ Module for High Q Inductors", IEEE Electron Device Letters, April 2002 vol.23, no. 4, pp.173-176.
    • (2002) IEEE Electron Device Letters , vol.23 , Issue.4 , pp. 173-176
    • Jenei, S.1
  • 6
    • 0042593026 scopus 로고    scopus 로고
    • High-Q RF Inductors on Standard Si Realized using Wafer-Level Packaging Techniques
    • presented at accepted for publication
    • G. Carchon, et al., "High-Q RF Inductors on Standard Si Realized using Wafer-Level Packaging Techniques", presented at IEEE MTT-S, Philadelphia, PE, June 8-13, 2003, accepted for publication.
    • IEEE MTT-S, Philadelphia, PE, June 8-13, 2003
    • Carchon, G.1
  • 7
    • 84942547525 scopus 로고    scopus 로고
    • Analysis, modeling and optimization of integrated passive components with RF capabilities in CMOS and BICMOS technologies
    • S. Jenei, et al., "Analysis, modeling and optimization of integrated passive components with RF capabilities in CMOS and BICMOS technologies", Proc. MWEE Workshop New Technologies for RF, April 2000, London, UK.
    • Proc. MWEE Workshop New Technologies for RF, April 2000, London, UK
    • Jenei, S.1
  • 9
    • 0038378982 scopus 로고    scopus 로고
    • Compact modeling for RF CMOS circuit simulation
    • A.J. Scholten, et al., "Compact modeling for RF CMOS circuit simulation", SISPAD 2001,pp. 194-201.
    • SISPAD 2001 , pp. 194-201
    • Scholten, A.J.1
  • 11
    • 0035509999 scopus 로고    scopus 로고
    • A Mixed-Signal Design Road Map
    • Nov/Dec
    • R. Brederlow, et al., "A Mixed-Signal Design Road Map", IEEE Design & Test of Computers, Nov/Dec 2001, pp. 34-46.
    • (2001) IEEE Design & Test of Computers , pp. 34-46
    • Brederlow, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.