System-on-a-programmable-chip development platforms in the classroom

IEEE Transactions on Education

Volumn 47, Issue 4, 2004, Pages 502-507

  Hall, Tyson S ^a   Hamblen, James O ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Altera; Field programmable gate array (FPGA); Microblaze; Nios; Processor core; System on a chip (SOC); System on a programmable chip (SOPC); Xilinx

Indexed keywords

C (PROGRAMMING LANGUAGE); COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; CURRICULA; ENGINEERING EDUCATION; PROGRAM COMPILERS; REDUCED INSTRUCTION SET COMPUTING; STUDENTS;

ALTERA NIOS PROCESSOR; SYSTEM-ON-A-CHIP (SOC); SYSTEM-ON-A-PROGRAMMABLE CHIP (SOPC); XILINX MICROBLAZE PROCESSOR;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 4544367113     PISSN: 00189359     EISSN: None     Source Type: Journal    
DOI: 10.1109/TE.2004.825926     Document Type: Article

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