Bit-plane and pass dual parallel architecture for coefficient bit modeling in JPEG2000

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 5, Issue , 2004, Pages

  Xu, Chao ^a   Han, Yanju ^a   Zhang, Yizhen ^a  

^a PEKING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY CODES; COLOR IMAGE PROCESSING; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; IMAGE CODING; LOGIC CIRCUITS; LOGIC GATES; PARALLEL PROCESSING SYSTEMS; WAVELET TRANSFORMS;

FRACTIONAL BIT PLANE (FBP) CODING; MAGNITUDE REFINEMENT CODING (MRC); SIGN CODING (SC); ZERO CODING (ZC);

IMAGE COMPRESSION;

EID: 4544328965     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. JPEG 2000 Part 1 020719 (Final Publication Draft), ISO/IEC JTC1/SC29/WG1 N2678, July, 2002
2. K. Andra, C. Chakrabarti, and T. Acharya, "A High-Performance JPEG2000 Architecture," IEEE Trans. Circuits Syst. Video Technol, vol. 13, pp. 209-218, March 2003
3. C. J. Lian, K. F. Chen, H. H. Chen, and L. G. Chen, "Analysis and Architecture Design of Block-Coding Engine for EBCOT in JPEG2000," IEEE Trans. Circuits Syst. Video Technol., vol. 13, pp. 219-230, March 2003
4. J. S. Chiang, Y. S. Lin, and C. Y. Hsieh, "Efficient Pass-Parallel Architecture for EBCOT in JPEG2000," IEEE ISCAS-2002, May 2002
5. Y. Li, R. E. Aly, M. A. Bayoumi, and S. A. Mashali, "Parallel High-Speed Architecture for EBCOT in JPEG2000," IEEE ICASSP-2003, May 2003