A 16Gb/s adaptive bandwidth on-chip bus based on hybrid current/voltage mode signaling

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2004, Pages 392-393

  Bashirullah, Rizwan ^a   Liu, Wentai ^a,b   Cavin, Ralph ^c   Edwards, Dale ^c  

^a North Carolina State University   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c SEMICONDUCTOR RESEARCH CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE BANDWIDTH BUS (ABS); CONTROL LINES; CONTROL LOGIC; INTERCONNECTION DELAY;

ADAPTIVE SYSTEMS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; CROSSTALK; DIGITAL SIGNAL PROCESSING; ELECTRIC IMPEDANCE; LOGIC GATES; TELECOMMUNICATION REPEATERS;

MICROPROCESSOR CHIPS;

EID: 4544298460     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. H.B. Bakoglu and J. Meindl, 1984 ISSCC, pp. 164-165.
2. R. Bashirullah et. al., DAC 2003, pp 628-633.