110nm NROM technology for code and data flash products

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2004, Pages 76-77

  Willer, Josef ^a   Ludwig, Christoph ^a   Deppe, Joachim ^a   Kleint, Christoph ^a   Riedel, Stephan ^a   Sachse, Jens Uwe ^a   Krause, Mathias ^a   Mikalo, Ricardo ^a   Kamienski, Elard Stein V ^a   Parascandola, Stefano ^a   Mikolajick, Thomas ^a   Fischer, Jan Malte ^a   Isler, Mark ^a   Kuesters, Karl Heinz ^a   Bloom, Ilan ^b   Shapir, Assaf ^b   Lusky, Eli ^b   Eitan, Boaz ^b  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b Saifun Semiconductors   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CODES (SYMBOLS); COMPUTER ARCHITECTURE; DIELECTRIC MATERIALS; ETCHING; GATES (TRANSISTOR); OPTICAL INTERCONNECTS; SCANNING ELECTRON MICROSCOPY;

CHARGE TRAPPING; GATE DIELECTRICS; NMOS TRANSISTORS; NONVOLATILE MEMORY;

FLASH MEMORY;

EID: 4544244785     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsit.2004.1345402     Document Type: Conference Paper

References (3)

1. J. Willer, Proc. IEEE NVSMW, 2003, Monterey p15, (2003)
2. B. Eitan, et al., Proc. SSDM 99, Tokyo 522(1999)
3. E. Lusky et al. IEEE Electron Dev. Lett., EDL-23(9), 556(2002)