A 1.25Gbit/s CMOS burst-mode optical transceiver for ethernet PON system

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2004, Pages 414-417

  Nishimura, Kazuko ^a   Kimura, Hiroshi ^a   Watanabe, Manabu ^a   Nagai, Tetsuya ^b   Nojima, Kazuhiro ^b   Gomyo, Kazumasa ^b   Takata, Masato ^c   Iwamoto, Mitsuhiro ^c   Asano, Hiroaki ^b  

^a PANASONIC CORPORATION   (Japan)

^b Panasonic Corporation   (Japan)

^c Panasonic MC Kanazawa R/DLCL   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; KNOWLEDGE ACQUISITION; MICROPROCESSOR CHIPS; MULTIMEDIA SYSTEMS; SENSITIVITY ANALYSIS; SIGNAL PROCESSING; TRANSCEIVERS; TRANSISTORS;

ETHERNET PASSIVE OPTICAL NETWORK (EPON) SYSTEMS; IP TRAFFIC; NETWORK SERVICES; OPTICAL TRANSCEIVERS;

CMOS INTEGRATED CIRCUITS;

EID: 4544227914     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. S.Yamashita et al., "Novel cell-AGC technique for burst-mode CMOS pre-amplifier with wide dynamic range and high sensitivity for ATM-PON system", IEEE J. Solid-State Circuits, Vol. 37, No.7, pp.881-886, July 2002
2. M.Nakamura et al., "A 156-Mb/s CMOS optical receiver for burst-mode transmission", IEEE J. Solid-State Circuits, Vol. 33, No.8, pp.1179-1187, Aug 1998
3. S Brigati et al., "A SiGe BiCMOS burst-Mode 155-Mb/s Receiver for PON" IEEE J. Solid-State Circuits, Vol. 37, No.7, pp.887-894, Jul 2002
4. H.Asano et al., "High performance optical receiver IC for PON systems" IEICE B-10-72 1998
5. IEEE Draft P802.3ah™/D3.0