FPGA implementation of LMS and N-LMS processor for adaptive array applications

2006 International Symposium on Intelligent Signal Processing and Communications, ISPACS'06

Volumn , Issue , 2006, Pages 485-488

  Oba, Hirokazu ^a   Kim, Minseok ^a   Arai, Hiroyuki ^a  

^a YOKOHAMA NATIONAL UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

LEAST SQUARES APPROXIMATIONS; SIGNAL PROCESSING; SMART ANTENNAS;

ADAPTIVE ARRAY ANTENNAS; CONVERGENCE PERFORMANCE; FIXED POINT OPERATION; FIXED-POINT IMPLEMENTATION; FPGA IMPLEMENTATIONS; FPGA(FIELD PROGRAMMABLE GATE ARRAY); LEAST MEAN SQUARES; RLS (RECURSIVE LEAST SQUARE);

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 45249083256     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPACS.2006.364703     Document Type: Conference Paper

References (8)

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