Scheduling parallel batch processors with incompatible job families using ant colony optimization

2006 IEEE International Conference on Automation Science and Engineering, CASE

Volumn , Issue , 2006, Pages 507-512

  Srinivasa Raghavan, N R ^a   Venkataramana, M ^a  

^a INDIAN INSTITUTE OF SCIENCE   (India)

Author keywords

Batch processor; Heuristics and ant colony optimization; Scheduling; Total weighted tardiness

Indexed keywords

ARTIFICIAL INTELLIGENCE; JOB SHOP SCHEDULING; PARALLEL PROCESSING SYSTEMS; SCHEDULING; SCHEDULING ALGORITHMS; SEMICONDUCTOR DEVICE MANUFACTURE;

ANT COLONY OPTIMIZATION (ACO); BATCH PROCESSORS; DISPATCHING RULES; INCOMPATIBLE JOB FAMILIES; SCHEDULING PROBLEM; SEMICONDUCTOR MANUFACTURING; TOTAL-WEIGHTED TARDINESS; WAFER FABRICATIONS;

ANT COLONY OPTIMIZATION;

EID: 45149110066     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/COASE.2006.326933     Document Type: Conference Paper

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