A new converter architecture for future generations of microprocessors

Conference Proceedings - IPEMC 2006: CES/IEEE 5th International Power Electronics and Motion Control Conference

Volumn 1, Issue , 2007, Pages 306-310

  Garinto, Dodi ^a  

^a Indonesia Power Electronics Center   (Indonesia)

Author keywords

Bypass LCfilter; Future microprocessors; Multi interleaving; New converter architecture; Switching frequency multiplication effect; Voltage regulator module

Indexed keywords

ARSENIC; CURRENT DENSITY; MICROFLUIDICS; MOTION CONTROL; MOTION PLANNING; POWER ELECTRONICS; TRANSIENT ANALYSIS;

BUCK CONVERTERS; BUCK TOPOLOGY; CONFERENCE PROCEEDINGS; CONVERTER ARCHITECTURES; CURRENT RIPPLES; CURRENT SHARING; DUTY CYCLES; FAST TRANSIENT RESPONSE; FUTURE GENERATIONS; GATE DRIVES; HIGH EFFICIENCY; HIGH POWER DENSITY (HPD); INPUT AND OUTPUT (I/O); INTERLEAVING TECHNIQUES; INTERNATIONAL (CO); LC FILTERS; LOSSES ANALYSIS; MULTI-PHASE; OUTPUT CURRENTS; OUTPUT VOLTAGES; SIMULATION RESULTS; TRANSIENT RESPONSES;

FREQUENCY RESPONSE;

EID: 45149088829     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPEMC.2006.297101     Document Type: Conference Paper

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