Binary-weighted digital-to-analog converter design using floating-gate voltage references

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 55, Issue 4, 2008, Pages 990-998

  Özalevli, Erhan ^a,b   Lo, Haw Jing ^a   Hasler, Paul E ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

Binary weighted; DAC; Digital to analog converter (DAC); Epot; Floating gate (FG); Floating gate transistor; Programmable; Transistor; Trimming

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; TEMPERATURE DISTRIBUTION;

BINARY-WEIGHTED SCALE FACTORS; FLOATING-GATE DIGITAL-TO-ANALOG CONVERTER;

DIGITAL TO ANALOG CONVERSION;

EID: 44949121912     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.916451     Document Type: Article

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