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Volumn 4916 LNCS, Issue , 2008, Pages 21-37

Application of static analyses for state space reduction to microcontroller assembly code

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER HARDWARE; PROBLEM SOLVING; STATE SPACE METHODS;

EID: 44649162655     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-79707-4_4     Document Type: Conference Paper
Times cited : (11)

References (16)
  • 3
    • 77956427069 scopus 로고    scopus 로고
    • Schlich, B., Kowalewski, S.: [mc]square: A model checker for microcontroller code. In: Margaria, T., Philippou, A., Steffen, B. (eds.) Proc. 2nd Int'l Symp. Leveraging Applications of Formal Methods, Verification and Validation (IEEE-ISoLA 2006) (2006); To appear in: IEEE proceedings
    • Schlich, B., Kowalewski, S.: [mc]square: A model checker for microcontroller code. In: Margaria, T., Philippou, A., Steffen, B. (eds.) Proc. 2nd Int'l Symp. Leveraging Applications of Formal Methods, Verification and Validation (IEEE-ISoLA 2006) (2006); To appear in: IEEE proceedings
  • 4
    • 38149085029 scopus 로고    scopus 로고
    • Model checking software for microcontrollers
    • Technical Report AIB-2006-11, RWTH Aachen University August
    • Schlich, B., Rohrbach, M., Weber, M., Kowalewski, S.: Model checking software for microcontrollers. Technical Report AIB-2006-11, RWTH Aachen University (August 2006)
    • (2006)
    • Schlich, B.1    Rohrbach, M.2    Weber, M.3    Kowalewski, S.4
  • 9
    • 0031357735 scopus 로고    scopus 로고
    • Efficient verification of real-time systems: Compact data structure and state-space reduction
    • IEEE Computer Society, Washington, DC, USA
    • Larsen, K.G., Larsson, F., Pettersson, P., Yi, W.: Efficient verification of real-time systems: Compact data structure and state-space reduction. In: Proc. 18th IEEE Real-Time Systems Symposium (RTSS 1997), pp. 14-24. IEEE Computer Society, Washington, DC, USA (1997)
    • (1997) Proc. 18th IEEE Real-Time Systems Symposium (RTSS , pp. 14-24
    • Larsen, K.G.1    Larsson, F.2    Pettersson, P.3    Yi, W.4
  • 10
    • 0041796552 scopus 로고    scopus 로고
    • Model checking the branching time temporal logic ctl
    • A45, Helsinki University of Technology May
    • Heljanko, K.: Model checking the branching time temporal logic ctl. Research Report A45, Helsinki University of Technology (May 1997)
    • (1997) Research Report
    • Heljanko, K.1
  • 11
    • 33749231812 scopus 로고
    • A linear local model checking algorithm for ctl
    • Best, E, ed, CONCUR 1993, Springer, Heidelberg
    • Vergauwen, B., Lewi, J.: A linear local model checking algorithm for ctl. In: Best, E. (ed.) CONCUR 1993. LNCS, vol. 715, pp. 447-461. Springer, Heidelberg (1993)
    • (1993) LNCS , vol.715 , pp. 447-461
    • Vergauwen, B.1    Lewi, J.2
  • 13
    • 3142749069 scopus 로고    scopus 로고
    • Yorav, K., Grumberg, O.: Static analysis for state-space reductions preserving temporal logics. Form. Methods Syst. Des. 25(1), 67-96 (2004)
    • Yorav, K., Grumberg, O.: Static analysis for state-space reductions preserving temporal logics. Form. Methods Syst. Des. 25(1), 67-96 (2004)
  • 15
    • 84948144846 scopus 로고    scopus 로고
    • The engineering of a model checker: The gnu i-protocol case study revisited
    • Dams, D.R, Gerth, R, Leue, S, Massink, M, eds, SPIN, Springer, Heidelberg
    • Holzmann, G.J.: The engineering of a model checker: The gnu i-protocol case study revisited. In: Dams, D.R., Gerth, R., Leue, S., Massink, M. (eds.) SPIN 1999. LNCS, vol. 1680, pp. 232-244. Springer, Heidelberg (1999)
    • (1999) LNCS , vol.1680 , pp. 232-244
    • Holzmann, G.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.