Heuristics to minimize makespan of parallel batch processing machines

International Journal of Advanced Manufacturing Technology

Volumn 37, Issue 9-10, 2008, Pages 1005-1013

  Damodaran, Purushothaman ^a   Chang, Ping Yu ^b  

^a FLORIDA INTERNATIONAL UNIVERSITY   (United States)

^b MING CHI UNIVERSITY OF TECHNOLOGY   (Taiwan)

Author keywords

Batch processing machines; Heuristics; Parallel machines; Scheduling

Indexed keywords

HEURISTIC ALGORITHMS; PARALLEL PROCESSING SYSTEMS; PRINTED CIRCUIT BOARDS; SCHEDULING ALGORITHMS; SIMULATED ANNEALING;

BATCH PROCESSING MACHINES; COMMERCIAL SOLVERS; PARALLEL MACHINES;

BATCH DATA PROCESSING;

EID: 44449084907     PISSN: 02683768     EISSN: 14333015     Source Type: Journal    
DOI: 10.1007/s00170-007-1042-8     Document Type: Article

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