메뉴 건너뛰기





Volumn , Issue , 2004, Pages 692-697

Flexible architectures for engineering successful SOCs

Author keywords

MPSOC; Processor cores; RISC; RTL; SOC

Indexed keywords

COMPUTER SOFTWARE; INTEGRATED CIRCUIT LAYOUT; LOGIC PROGRAMMING; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; OPTIMIZATION; REDUCED INSTRUCTION SET COMPUTING; RISK ASSESSMENT;

EID: 4444372352     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996755     Document Type: Conference Paper
Times cited : (11)

References (0)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.