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Volumn , Issue , 2004, Pages 692-697
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Flexible architectures for engineering successful SOCs
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Author keywords
MPSOC; Processor cores; RISC; RTL; SOC
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Indexed keywords
COMPUTER SOFTWARE;
INTEGRATED CIRCUIT LAYOUT;
LOGIC PROGRAMMING;
MATHEMATICAL MODELS;
MICROPROCESSOR CHIPS;
OPTIMIZATION;
REDUCED INSTRUCTION SET COMPUTING;
RISK ASSESSMENT;
PROCESSOR CORES;
RTL;
SYSTEM ON CHIP (SOC);
SEMICONDUCTOR DEVICE MANUFACTURE;
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EID: 4444372352
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/996566.996755 Document Type: Conference Paper |
Times cited : (11)
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References (0)
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