Model and verification of triple-well shielding on substrate noise in mixed-signal CMOS ICs

European Solid-State Circuits Conference

Volumn , Issue , 2003, Pages 643-646

  Rossi, Roberto ^a   Torelli, Guido ^a   Liberali, Valentino ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b UNIVERSITY OF MILAN   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

MIXED SIGNAL; MIXED-SIGNAL CMOS INTEGRATED CIRCUITS; MODELING AND VERIFICATIONS; SUBSTRATE NOISE; SUBSTRATE NOISE COUPLING; TEST CHIPS; TRIPLE WELL;

CMOS INTEGRATED CIRCUITS;

SHIELDING;

EID: 4444315422     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2003.1257217     Document Type: Conference Paper

References (2)

1. M. Badaroghj et al., "Modeling and experimental verification of substrate noise generation in a 220Kgates WLAN system-on-chip with multiple supplies", in Proc. ESSCIRC, pp. 291-294, Florence, Italy, Sept. 2002.
2. V. Liberali, R. Rossi, and G. Torelli, "A simple model for digital/analog crosstalk simulation in deep submicron CMOS technology", in Proc. ECCTD, vol. I, pp. 169-172, Espoo, Finland, Aug. 2001.