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Volumn , Issue , 2008, Pages 23-32

Adding slow-silent virtual channels for low-power on-chip networks

Author keywords

[No Author keywords available]

Indexed keywords

LOW-POWER ON-CHIP NETWORKS; VIRTUAL CHANNELS;

EID: 44149093159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NOCS.2008.4492722     Document Type: Conference Paper
Times cited : (39)

References (23)
  • 7
    • 0027837827 scopus 로고    scopus 로고
    • J. Duato. A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks. IEEE Transactions on Pamllel and Distributed Systems. 4(12):1320-1331, Dec. 1993.
    • J. Duato. A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks. IEEE Transactions on Pamllel and Distributed Systems. 4(12):1320-1331, Dec. 1993.
  • 11
    • 33645572691 scopus 로고    scopus 로고
    • A 4500 MIPS/W, 86μA Resume-Standby, 11μA Ultra-Standby Application Processor for 3G Cellular Phones
    • Apr
    • M. Ishikawa et al. A 4500 MIPS/W, 86μA Resume-Standby, 11μA Ultra-Standby Application Processor for 3G Cellular Phones. IEICE Transactions on Electranics, E88-C(4):528-535, Apr. 2005.
    • (2005) IEICE Transactions on Electranics , vol.E88-C , Issue.4 , pp. 528-535
    • Ishikawa, M.1
  • 16
    • 19944427319 scopus 로고    scopus 로고
    • Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor
    • Jan
    • M. Nakai et al. Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor. IEEE Journal of Solid-State Circuits, 40(1):28-35, Jan. 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.1 , pp. 28-35
    • Nakai, M.1
  • 17
    • 0036116463 scopus 로고    scopus 로고
    • A 0.9V to 1.95V Dynamic Voltage-Scalable and Frequency-Scalable 32b PowerPC Processor
    • Feb
    • K. Nowka et al. A 0.9V to 1.95V Dynamic Voltage-Scalable and Frequency-Scalable 32b PowerPC Processor. Proceedings of the International Solid-State Circuits Conference, pages 340-341, Feb. 2002.
    • (2002) Proceedings of the International Solid-State Circuits Conference , pp. 340-341
    • Nowka, K.1
  • 18
    • 0025415048 scopus 로고
    • Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas
    • Apr
    • T. Sakurai and A. R. Newton. Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas. IEEE Journal of Solid-State Circuits, 25(2):584-594, Apr. 1990.
    • (1990) IEEE Journal of Solid-State Circuits , vol.25 , Issue.2 , pp. 584-594
    • Sakurai, T.1    Newton, A.R.2
  • 20
    • 33947389289 scopus 로고    scopus 로고
    • Exploring the Design Space of SelfRegulating Power-Aware On/Off Interconnection Networks
    • Mar
    • V. Soteriou and L.-S. Peh. Exploring the Design Space of SelfRegulating Power-Aware On/Off Interconnection Networks. IEEE Transactions on Parallel and Distributed Systems, 18(3):393-408, Mar. 2007.
    • (2007) IEEE Transactions on Parallel and Distributed Systems , vol.18 , Issue.3 , pp. 393-408
    • Soteriou, V.1    Peh, L.-S.2
  • 21
    • 38348999288 scopus 로고    scopus 로고
    • Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
    • Jan
    • J. M. Stine and N. P. Carter. Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction. IEEE Computer Architecture Letters, 3(1):14-17, Jan. 2004.
    • (2004) IEEE Computer Architecture Letters , vol.3 , Issue.1 , pp. 14-17
    • Stine, J.M.1    Carter, N.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.