I/O architecture for improved ESD protection in deep sub-micron SOI technologies

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2006, Pages 37-38

  Mitra, S ^a   Gauthier, R ^a   Salman, A ^a   Putnam, C ^a   Beebe, S ^b   Halbach, R ^a   Seguin, C ^a  

^a IBM MICROELECTRONICS   (United States)

^b ADVANCED MICRO DEVICES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 43749105569     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2006.284421     Document Type: Conference Paper

References (3)

1. E. Leobandung, et al, Symp. VLSI Tech, and Circuits, 2005,
2. S. Mitra et al, IEEE SOI Conf. 2005,
3. G.Boselli et.al, EOS/ESD Symp., 2005.