Exploration of the circuit potential of multiple-gate field-effect transistors

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2006, Pages 167-168

  Ramos, J ^a   Nackaerts, A ^a   Chiarella, T ^a   Von Arnim, K ^b   Varela, O ^a   Augendre, E ^a   Severi, S ^a,c   Kerner, C ^a   Rosmeulen, M ^a   Hoffmann, T ^a   Collaert, N ^a   Jurczak, M ^a   Biesemans, S ^a  

^a IMEC   (Belgium)

^b INFINEON TECHNOLOGIES AG   (Germany)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INVERTERS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; OSCILLATORS (ELECTRONIC); STRAIN; WORK FUNCTION;

CIRCUIT LEVEL; CIRCUIT POTENTIAL; COMPREHENSIVE ANALYSIS; INVERTER LAYOUT; RING OSCILLATORS;

FIELD EFFECT TRANSISTORS;

EID: 43749091277     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2006.284490     Document Type: Conference Paper

References (11)