FPGA acceleration of the tate pairing in characteristic 2

Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006

Volumn , Issue , 2006, Pages 213-220

  Ronan, Robert ^a   Héigeartaigh, Colm Ó ^b   Murphy, Colin ^a   Scott, Michael ^b   Kerins, Tim ^a  

^a UNIVERSITY COLLEGE CORK   (Ireland)

^b DUBLIN CITY UNIVERSITY   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAM PROCESSORS; RAPID PROTOTYPING;

COMPUTATION TIME; HARDWARE PIPELINING; TATE PAIRING;

COMPUTER HARDWARE;

EID: 43749084159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2006.270314     Document Type: Conference Paper

References (18)

1. R. Dutta, R.Barua, and P. Sarkar, "Pairing-Based Cryptography: A Survey," Cryptology ePrint Archive, http://eprint.iacr.org/2004/64, Report 2004/064, 2004.
2. G. Frey and H.-G. Rück, "A remark concerning m-divisitaility and the discrete logarithm, problem in the divisor class group of curves," Math. Comp., vol. 52, pp. 865-874, 1994.
3. V. Miller, "Short programs for functions on curves," Unpublished Manuscript, 1986.
4. P. S. L. M. Barreto, H. Y. Kim, B. Lynn, and M. Scott, "Efficient algorithms for pairing-based cryptosystems," in Advances in Cryptology - Crypto'2002, ser. Lecture Notes in Computer Science, vol. 2442. Springer-Verlag, 2002, pp. 354-368.
5. S. Galbraith, K. Harrison, and D. Soldera, "Implementing the Tate pairing," in Algorithmic Number Theory - ANTS V, ser. Lecture Notes in Computer Science, vol. 2369. Springer-Verlag, 2002, pp. 324-337.
6. p - x + d," in Advances in Cryptology - Asiacrypt'2003, ser. Lecture Notes in Computer Science, vol. 2894. Springer-Verlag, 2003, pp. 111-123.
7. P. Barreto, S. Galbraith, C. O. hÉigeartaigh, and M. Scott, "Efficient Pairing Computation on Supersingular Abelian Varieties," Cryptology ePrint Archive, http://eprint.iaor.org/2004/375, Report 375/2004, 2004.
8. S. Kwon, "Efficient Tate pairing computation for supersingular elliptic curves over binary fields," Cryptology ePrint Archive, http://eprint.iacr.org/2004/303, Report 2004/303, 2004.
9. T. Kerins, W. Marnane, E. Popovici, and P. Barreto, "Efficient Hardware for the Tate Pairing Calculation in Characteristic 3," in Cryptographic Hardware and Embedded Systems (CHES), vol. 3659 of LNCS. Springer, 2005, pp. 412-426.
10. P. Grabher and D. Page, "Hardware acceleration of the tate pairing in characteristic three," in Cryptographic Hardware and Embedded Systems - CHES'2005, ser. Lecture Notes in Computer Science, vol. 3659. Springer-Verlag, 2005, pp. 398-411.
11. R. Ronan, C. O. hÉigeartaigh, C. Murphy, M. Scott, T. Kerins, and W. Marnane, "An Embedded Processor for a Pairing-Based Cryptosystem," in Information Technology: New Generations. IEEE Computer Society, 2006, pp. 192-197.
12. m) Tate Pairing Architecture," in International Workshop on Applied Reconfigurable Computing (ARC) (proceedings to appear), 2006.
13. E. Verheul, "Evidence that XTR is more secure than supersingular elliptic curve cryptosystems," in Advances in Cryptology - Eurocrypt'2001, ser. Lecture Notes in Computer Science, vol. 2045. Springer-Verlag, 2001, pp. 195-210.
14. m)," in Cryptographic Hardware and Embedded Systems (CHES), vol. 1965 of LNCS. Springer, 2000, pp. 41-56.
15. m)," IEEE Transactions on Computers, vol. 42, pp. 1010-1015, 1993.
16. L. Song and K. Parhi, "Low-Energy Digit-Serial/Parallel Finite Field Multipliers," Journal of VLSI Signal Processing Systems, vol. 2(22), pp. 1-17, 1997.
17. A. Karatsuba and Y. Ofman, "Multiplication of Multidigit numbers on Automata," Sov. Phys. Dokl (english translation), vol. 7(7), pp. 595-596, 1963.
18. n)," in PKC 2000, vol. 1751 of LNCS. Springer, 2000, pp. 405-421.