A 1V 4.2mW fully integrated 2.5Gb/s CMOS limiting amplifier using folded active inductors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

  Wu, Chia Hsin ^a   Liao, Jieh Wei ^a   Liu, Shen Iuan ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); ELECTRIC IMPEDANCE; ELECTRIC INDUCTORS; ELECTRIC POTENTIAL; GAIN CONTROL; LOCAL AREA NETWORKS;

ON-CHIP INDUCTORS; OPTICAL RECEIVERS; TRANSIMPEDANCE AMPLIFIERS (TIA);

CMOS INTEGRATED CIRCUITS;

EID: 4344714903     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

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2. A. Tanabe, M. Soda, Y. Nakahara, A. Furukawa, T. Tamura, and K. Yoshida., "A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate crosstalk preamplifier", International Symposium on Solid-State Circuits Conference, pp. 304-305, Feb. 1998.
3. W. Z. Chen, and C. H. Lu, "A 2.5 Gbps CMOS Optical Receiver Analog Front-End." IEEE Custom Integrated Circuit Conference, pp. 359-362, May 2002.
4. E. Säckinger, and W. C. Fischer, "A 3-GHz 32-dB CMOS Limiting Amplifier for SONET OC-48 Receivers," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1884-1888, Dec. 2000
5. S. Galal, and B. Razavi, "10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18μm CMOS Technology", International Symposium on Solid-State Circuits Conference, pp. 188-189, Feb. 2003.