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Volumn 2, Issue , 2004, Pages

High-speed hardware implementations of the KASUMI block cipher

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MOBILE TELECOMMUNICATION SYSTEMS; PIPELINES; STANDARDIZATION; VLSI CIRCUITS;

EID: 4344706358     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (19)

References (12)
  • 9
    • 4344593415 scopus 로고    scopus 로고
    • Small and high-speed hardware architectures for the 3GPP standard cipher KASUMI
    • Sao Paulo, Brazil, September 30 - October 2, 2002, Lecture Notes in Computer Science 2433 Springer
    • Akashi Satoh, Sumio Morioka, "Small and High-Speed Hardware Architectures for the 3GPP Standard Cipher KASUMI", Proceedings of the 5th International Conference Information Security, ISC 2002 Sao Paulo, Brazil, September 30 - October 2, 2002, Lecture Notes in Computer Science 2433 Springer 2002.
    • (2002) Proceedings of the 5th International Conference Information Security, ISC 2002
    • Satoh, A.1    Morioka, S.2
  • 11
    • 4344566245 scopus 로고    scopus 로고
    • Xilinx, San Jose, 2003, California, USA, Virtex
    • Xilinx, San Jose, 2003, California, USA, Virtex, www.xilinx.com


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.