In situ fault detection of wafer warpage in microlithography

IEEE Transactions on Semiconductor Manufacturing

Volumn 17, Issue 3, 2004, Pages 402-407

  Ho, Weng Khuen ^a   Tay, Arthur ^a   Zhou, Ying ^b   Yang, Kai ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b INSTITUTE OF CHEMICAL AND ENGINEERING SCIENCES   (Singapore)

Author keywords

Fault detection; Microlithography; Temperature measurement; Wafer warpage

Indexed keywords

FAULT DETECTION; SEMICONDUCTOR SUBSTRATES; THERMAL PROCESSING; WAFER WARPAGE;

CLOSED LOOP CONTROL SYSTEMS; HEATING; LITHOGRAPHY; PNEUMATICS; SENSITIVITY ANALYSIS; SIGNAL PROCESSING; TEMPERATURE MEASUREMENT; THERMAL EXPANSION;

SILICON WAFERS;

EID: 4344681546     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2004.831536     Document Type: Conference Paper

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