An optimised design of an improved voltage tripler

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 1, Issue , 2001, Pages 353-356

  Zhang, M ^a   Llaser, N ^a   Devos, F ^a  

^a UNIVERSITÉ PARIS SACLAY   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP; DIE AREA; OUTPUT VOLTAGES; PARASITIC CAPACITANCE; PRE-CHARGE; RESISTIVE LOADS; THEORETICAL LIMITS;

PUMPS;

DESIGN;

EID: 4344644635     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. M. Zhang, N. Llaser and F. Devos, "Integrated multi-value voltage-to-voltage converter", IEEE Int. Conf. Electronics, Circuits and Systems, Cyprus, Sept. 6-8, 1999, pp. 335-338.
2. M. Zhang, N. Llaser and F. Devos, "Multi-value Voltage-to-voltage Converter Using a Multi-stage Symmetrical Charge Pump for on-chip EEPROM Programming", Analog Integrated Circuits and Signal Processing, Vol.27, April, 2001, pp. 85-95.
3. M. Zhang, N. Llaser and F. Devos, "An improved structure of voltage tripler with symmetrical stacking charge pump", Electronics letters, Vol. 37, NO. 11, 2001, pp. 668-669.