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Volumn 3, Issue , 1999, Pages 1619-1622

Duty cycle control circuit and applications to frequency dividers

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; ELECTRIC CLOCKS; FREQUENCY DIVIDING CIRCUITS; VIBRATORS;

EID: 4344644610     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.1999.814483     Document Type: Conference Paper
Times cited : (8)

References (12)
  • 2
    • 0026954972 scopus 로고
    • A PLL clock generator with 5 to 110 MHz of lock range for microprocessors
    • Nov.
    • I. A. Young et al., "A PLL clock generator with 5 to 110 MHz of lock range for microprocessors," IEEE J. Solid-State Circuits, vol. 27, pp. 1599-1607, Nov. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1599-1607
    • Young, I.A.1
  • 4
    • 0023326940 scopus 로고
    • Design of PLL-based clock generation circuits
    • Apr.
    • D.-K. Jeong el al., "Design of PLL-based clock generation circuits," IEEE .I. Solid-state Circuits, vol. 22, pp. 255-261, Apr. 1987.
    • (1987) IEEE I. Solid-state Circuits , vol.22 , pp. 255-261
    • Jeong, D.-K.1
  • 6
    • 0029255343 scopus 로고
    • Fully-integrated CMOS phase-locked loop with 15-240 MHz locking range and +/-50 ps jitter
    • 13, Jan.
    • I. Novof et al., "Fully-integrated CMOS phase-locked loop with 15-240 MHz locking range and +/-50 ps jitter," in hoc. IEEE Int. Solid-State Circuit Conf., pp. 112-1 13, Jan. 1995.
    • (1995) Hoc. IEEE Int. Solid-State Circuit Conf , pp. 112-121
    • Novof, I.1
  • 7
    • 0028385043 scopus 로고
    • Cell-based fully integrated CMOS frequency synthesizers
    • Mar.
    • D. Mijuskavic et al., "Cell-based fully integrated CMOS frequency synthesizers," IEEE J. Solid-State Circuits, vol. 29, pp. 271-280, Mar. 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 271-280
    • Mijuskavic, D.1
  • 8
    • 0029289178 scopus 로고
    • A wide-baridwidth low-voltage PLL for power PC roicroprocessors
    • Apr.
    • J. Alvareze et al., "A wide-baridwidth low-voltage PLL for power PC roicroprocessors," IEEE J. Solid-State Circuits, vol. 30, pp, 383-392, Apr. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , pp. 383-392
    • Alvareze, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.