3-D floorplanning using labeled tree and dual sequences

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2008, Pages 54-59

  Wang, Renshen ^a   Young, Evangeline F Y ^b   Znu, Yi ^a   Graham, Fan Chung ^a   Graham, Ronald ^a   Cheng, Chung Kuan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

3 D packing; Labeled tree; Sequence

Indexed keywords

3-D PACKING; LABELED TREES;

LOGIC DESIGN; MICROELECTRONICS; THREE DIMENSIONAL COMPUTER GRAPHICS; VLSI CIRCUITS;

ELECTRONICS PACKAGING;

EID: 43349094586     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1353629.1353641     Document Type: Conference Paper

References (13)