Enhancing microkernel performance on VLIW DSP processors via multiset context switch

Journal of Signal Processing Systems

Volumn 51, Issue 3, 2008, Pages 257-268

  Hsieh, Kun Yuan ^a   Lin, Yung Chia ^a   Huang, Chien Chin ^a   Lee, Jenq Kuen ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Microkernel design; Optimizing context switch overhead; VLIW DSP processor

Indexed keywords

FILTER BANKS; LOGIC DESIGN; MULTIMEDIA SYSTEMS; SCHEDULING ALGORITHMS; SWITCHING SYSTEMS;

KERNEL SCHEDULING; MICROKERNEL DESIGN; OPTIMIZING CONTEXT SWITCH OVERHEAD; VLIW DSP PROCESSORS;

DIGITAL SIGNAL PROCESSING;

EID: 43149125173     PISSN: 19398018     EISSN: 19398115     Source Type: Journal    
DOI: 10.1007/s11265-007-0060-y     Document Type: Article

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