Hardware-rooted trust for secure key management and transient trust

Proceedings of the ACM Conference on Computer and Communications Security

Volumn , Issue , 2007, Pages 389-400

  Dwoskin, Jeffrey S ^a   Lee, Ruby B ^a  

^a Princeton University   (United States)

Author keywords

Emergency response; Hard ware policy enforcement; Key management; Secret protection (SP); Secure processors; Transient trust

Indexed keywords

EMERGENCY RESPONSE; KEY MANAGEMENT; POLICY ENFORCEMENT; SECRET PROTECTION (SP); SECURE PROCESSORS;

COMPUTER HARDWARE; NETWORK SECURITY; PUBLIC KEY CRYPTOGRAPHY;

COMPUTER SOFTWARE;

EID: 42549167254     PISSN: 15437221     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1315245.1315294     Document Type: Conference Paper

References (14)

1. R. Lee, P. Kwan, J. P. McGregor, J. Dwoskin, Z. Wang. "Architecture for Protecting Critical Secrets in Microprocessors, " Proceedings of the 32nd International Symposium on Computer Architecture (ISCA 2005), pp. 2-13, June 2005.
2. IETF Network Working Group. "Pre-Shared Key Ciphersuites for Transport Layer Security (TLS), " Request for Comments: 4279. http://www.ietf.org/rfc/rfc4279.txt
3. R. C. Merkle. "Protocols for public key cryptography, " IEEE Symposium on Security and Privacy, pp. 122U134, 1980.
4. Trusted Computing Group. "Trusted Platform Module (TPM) Specifications, " April 2006. https://www.trustedcomputinggroup.org/specs/ TPM
5. National Institute of Standards and Technology, "Advanced Encryption Standard, " Federal Information Processing Standards Publication, FIPS Pub 197, Nov. 2001.
6. Intel, "LaGrande Technology Architectural Overview, " http://www.intel.com/technology/security/, September 2003.
7. National Institute of Standards and Technology. "The Keyed-Hash Message Authentication Code (HMAC), " Federal Information Processing Standards Publication, FIPS Pub 198. http://csrc.nist.gov/publications/fips/ fips198/fips-198apdf
8. "ITU-T Recommendation X.509, The Directory: Authentication Framework", Int'l Telecomm. Union, Geneva, 2000; ISO/IEC 9594-8.
9. D. Lie, C. Thekkath, M. Mitchell, P. Lincoln, D. Boneh, J. Mitchell, and M. Horowitz. "Architectural Support for Copy and Tamper Resistant Software, " Proc. of the 9th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS-IX)., pp. 168-177, 2000.
10. G. E. Suh, D. Clarke, B. Gassend, M. van Dijk, and S. Devadas. "AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing, " Proc. of the 17th Int'l Conf. on Supercomputing (ICS), 2003.
11. R. M. Best, "Preventing Software Piracy with Crypto-Microprocessors, " Proc. of IEEE Spring COMPCON Š80, pp. 466-469, 1980.
12. T. Gilmont, J. D. Legat, and J. J. Quisquater "An Architecture of Security Management Unit for Safe Hosting of Multiple Agents, " Proc. of the Int'l Workshop on Intelligent Communications and Multimedia Terminals, pp. 79-82, Nov. 1998.
13. D. Kirovski, M. Drinic, and M. Potkonjak. "Enabling Trusted Software Integrity, " Proc. of the 10th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), October 2002.
14. "SecureCore for Trustworthy Commodity Computing and Communications, " collaborative project by Princeton University, Naval Postgraduate School and University of Southern California. Project home-page at http://palms.ee. princeton.edu/securecore/