Towards a theory of cache-efficient algorithms

Journal of the ACM

Volumn 49, Issue 6, 2002, Pages 828-858

  Sen, Sandeep ^a   Chatterjee, Siddhartha ^b,c   Dumir, Neeraj ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

^b IBM RESEARCH   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Hierarchical memory; I O complexity; Lower bound

Indexed keywords

COMPUTING DEVICES; HIERARCHICAL MEMORY; I/O COMPLEXITY; LOWER BOUND;

ALGORITHMS; BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; MATHEMATICAL MODELS; MATRIX ALGEBRA; PARAMETER ESTIMATION; ROBUSTNESS (CONTROL SYSTEMS);

COMPUTATION THEORY;

EID: 4243187062     PISSN: 00045411     EISSN: None     Source Type: Journal    
DOI: 10.1145/602220.602225     Document Type: Article

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