A rule grouping technique for weight-based TCAM coprocessors [packet classification application]

Proceedings - 11th Symposium on High Performance Interconnects, HOTI 2003

Volumn , Issue , 2003, Pages 32-37

  Che, Hao ^a   Wang, Yong ^a   Wang, Zhijun ^a  

^a The University of Texas at Arlington   (United States)

Author keywords

Associative memory; Clocks; Computer science; Coprocessors; Hardware; Yarn

Indexed keywords

ASSOCIATIVE PROCESSING; ASSOCIATIVE STORAGE; CLOCKS; COMPUTER HARDWARE; COMPUTER SCIENCE; HARDWARE; LOGIC GATES; MEMORY ARCHITECTURE; YARN;

ASSOCIATIVE MEMORY; CO-PROCESSORS; FULLY PROGRAMMABLES; GROUPING TECHNIQUE; PACKET CLASSIFICATION; SPECIAL HARDWARE; TERNARY CONTENT ADDRESSABLE MEMORY;

TERNARY CONTENT ADRESSABLE MEMORY;

EID: 42149111533     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CONECT.2003.1231474     Document Type: Conference Paper

References (6)

1. P. Gupta and N. McKeown, "Algorithms for Packet Classification," IEEE Network, March 2001.
2. http://www.netlogicmicro.com/library/zerotable.html
3. D. Shah and P. Gupta, "Fast Updating Algorithms for TCAMs," IEEE Micro, p. 36, Jan.-Feb 2001.
4. http://www.amcc.com
5. http://www.netlogicmicro.com/datasheets/cfp3256.html
6. M. E. Kounavis, A. Kumar, H. Vin, R. Yavatkar and A. T. Campbell, "Directions in Packet Classification for Network Processors", Second Workshop on Network Processors (NP2), February 8-9, 2003.