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Volumn , Issue , 2006, Pages 363-368

POEtic: A hardware prototyping platform with bio-inspired capabilities

Author keywords

Bio inspired systems; FPGAs; Hardware prototyping; VLSI design

Indexed keywords

DYNAMIC PROGRAMMING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROELECTRONICS; MICROPROCESSOR CHIPS; VLSI CIRCUITS;

EID: 41549147445     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (6)

References (5)
  • 3
    • 0025225968 scopus 로고
    • Multiplier Policies for Digital Signal Processing
    • January
    • G.-K. Ma, F.J. Taylor, "Multiplier Policies for Digital Signal Processing", IEEE ASSP Magazine, pp. 6-20, January 1990.
    • (1990) IEEE ASSP Magazine , pp. 6-20
    • Ma, G.-K.1    Taylor, F.J.2
  • 4
    • 34147120474 scopus 로고
    • A note on two problems in connexion with graphs
    • Edsger. W. Dijkstra. A note on two problems in connexion with graphs. Numerische Mathematik, 1:269-271, 1959.
    • (1959) Numerische Mathematik , vol.1 , pp. 269-271
    • Edsger1    Dijkstra, W.2
  • 5
    • 4444336117 scopus 로고    scopus 로고
    • Hardware optimization and serial implementation of a novel spiking neuron model for the POEtic tissue
    • BioSystems, August_October
    • O. Torres, J. Eriksson, J.M. Moreno, A. Villa, "Hardware optimization and serial implementation of a novel spiking neuron model for the POEtic tissue", BioSystems, Vol. 76, No. 1-3, pp 201-208, August_October 2004.
    • (2004) , vol.76 , Issue.1-3 , pp. 201-208
    • Torres, O.1    Eriksson, J.2    Moreno, J.M.3    Villa, A.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.