Implementation of Bayesian network in FPGA circuit

Proceedings of the International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2006

Volumn , Issue , 2006, Pages 711-715

  Kulesza, Z ^a   Tylman, W ^a  

^a LODZ UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

Bayesian networks; FPGA; Probabilistic networks

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROELECTRONICS; PARALLEL PROCESSING SYSTEMS;

COMPUTATION ALGORITHMS; COMPUTATIONAL BLOCKS; FPGA CIRCUITS; PROBABILISTIC NETWORKS;

BAYESIAN NETWORKS;

EID: 41549090159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. R. Cowell, P. Dawid, S. Lauritzen, and D. Spiegelhalter. Probabilistic Networks and Expert Systems. Springer, New York, 1999.
2. Z. Kulesza and W. Tylman. Realizacja sieci probabilistycznej w strukturze fpga. wytyczne dla procesu implementacji. In Konferencja Katedry Mikroelektronik i Technik Informatycznych, Mikorzyn, 2005.
3. J. Pearl. Probabilistic Reasoning in Intelligent Systems: Networks of Plausible Inference. Morgan Kaufmann Publishers, San Mateo, 1988.
4. B. Pochopień. Arytmetyka w systemach cyfrowych. Akademicka Oficyna Wydawnicza EXIT, Warszawa, 2004.
5. W. Tylman. Advanced Numerical Algorithms for Monitoring Pressure Vessel Installations. PhD thesis, Politechnika Łódzka, 2004.