A dual-band transceiver for GSM and DCS1800 applications

European Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 84-87

  Yamawaki, Taizo ^a   Kokubo, Masaru ^a   Irie, Kiyoshi ^a   Matsui, Hiroaki ^a   Hori, Kazuaki ^a   Furuya, Tomio ^a   Shimizu, Yoshimi ^a   Katagishi, Makoto ^a   Endou, Takefumi ^a   Henshaw, Bob ^b   Hildersley, Julian Robert ^b  

^a HITACHI LTD   (Japan)

^b Technology Partnership Plc   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BI-CMOS PROCESS; DUAL-BAND; EVALUATION RESULTS; LOW COSTS; OFFSET PHASE-LOCKED LOOPS; PHASE ERROR; TRANSCEIVER IC;

BICMOS TECHNOLOGY; TRANSMITTERS;

TRANSCEIVERS;

EID: 4143138388     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIR.1998.186214     Document Type: Conference Paper

References (4)

1. S. Wu and B. Razavi, "A 900MHz / 1.8GHz CMOS Receiver for Dual Band Applications," IEEE Int. Solid-State Circuits Conf., pp. 124-125,1998
2. T. Antes and C. Conkling, "RF Chip Set Fits Multimode Cellular/PCS Handsets," Microwaves &RF, pp. 177-186, Dec. 1996
3. T. Yamawaki, M. Kokubo, K. Irie, H. Matsui, K. Hori, T. Endou, H. Hagisawa, T. Furuya, Y. Shimizu, M. Katagishi, and J. R. Hildersley, "A 2.7-V GSM RF Transceiver IC," IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 2089-2096, Dec. 1997
4. K. Irie, H. Matsui, T. Endou, K. Watanabe, T. Yamawaki, M. Kokubo, and J. Hildersley, "A 2.7V GSM Transceiver IC," IEEE Int. Solid-State Circuits Conf., pp. 302303, 1997