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Volumn 5, Issue , 2004, Pages 2799-2806

Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication

Author keywords

Backplane; Capacity; Jitter; Precoding; Serial link

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; BANDWIDTH; DATA ACQUISITION; DIGITAL COMMUNICATION SYSTEMS; GAUSSIAN NOISE (ELECTRONIC); JITTER; SIGNAL PROCESSING; WHITE NOISE;

EID: 4143134378     PISSN: 05361486     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icc.2004.1313040     Document Type: Conference Paper
Times cited : (23)

References (18)
  • 1
    • 0032181532 scopus 로고    scopus 로고
    • Transmitter precoding in synchronous multiuser communications
    • October
    • B.R. Vojčić and W.M. Jang, "Transmitter Precoding in Synchronous Multiuser Communications," IEEE Transactions on Communications, vol. 46, no. 10, October 1998, pp. 1346-55.
    • (1998) IEEE Transactions on Communications , vol.46 , Issue.10 , pp. 1346-1355
    • Vojčić, B.R.1    Jang, W.M.2
  • 2
    • 0000873824 scopus 로고
    • Fractional programming
    • eds. Horst, R. and P.M. Pardalos, Nonconvex Optimization and its Applications, 2, Kluwer Academic Publishers, Dordrecht - Boston-London
    • S. Schaible, "Fractional programming," Handbook of Global Optimization, eds. Horst, R. and P.M. Pardalos, Nonconvex Optimization and its Applications, 2, Kluwer Academic Publishers, Dordrecht - Boston-London, 1995, pp. 495-608.
    • (1995) Handbook of Global Optimization , pp. 495-608
    • Schaible, S.1
  • 3
    • 0037969368 scopus 로고    scopus 로고
    • Design, equalization and clock recovery for a 2.5-10Gb/s 2-PAM/4-PAM backplane transceiver cell
    • Feb. San Francisco
    • J. Zerbe et al., "Design, Equalization and Clock Recovery for a 2.5-10Gb/s 2-PAM/4-PAM Backplane Transceiver Cell," IEEE International Solid-State Circuits Conference, Feb. 2003, San Francisco.
    • (2003) IEEE International Solid-state Circuits Conference
    • Zerbe, J.1
  • 4
    • 0141538244 scopus 로고    scopus 로고
    • 0.622-8.0Gbps 150mW serial IO macrocell with fully flexible preemphasis and equalization
    • June
    • R. Farjad-Rad et al, "0.622-8.0Gbps 150mW Serial IO Macrocell with Fully Flexible Preemphasis and Equalization", IEEE Symposium on VLSI Circuits, June 2003.
    • (2003) IEEE Symposium on VLSI Circuits
    • Farjad-Rad, R.1
  • 5
    • 0024754187 scopus 로고
    • Matching properties of MOS transistors
    • Oct.
    • M.J. Pelgrom et al., "Matching properties of MOS transistors," IEEE Journal Solid-State Circuits, vol. 24, no. 5, pp. 1433-1439, Oct. 1989.
    • (1989) IEEE Journal Solid-state Circuits , vol.24 , Issue.5 , pp. 1433-1439
    • Pelgrom, M.J.1
  • 6
    • 2442431817 scopus 로고    scopus 로고
    • Offset compensation in comparators with minimum input-referred supply noise
    • submitted to
    • K-L.J. Wong and C-K.K. Yang, "Offset Compensation in Comparators with Minimum Input-Referred Supply Noise," submitted to IEEE Journal Solid-State Circuits.
    • IEEE Journal Solid-state Circuits
    • Wong, K.-L.J.1    Yang, C.-K.K.2
  • 11
    • 0013019272 scopus 로고    scopus 로고
    • A CMOS frequency synthesizer with an injection-locked frequency divider for a 5 GHz Wire LAN receiver
    • May
    • H. Rategh, H. Samavati, and T. Lee, "A CMOS frequency synthesizer with an injection-locked frequency divider for a 5 GHz Wire LAN receiver," IEEE J. Solid-State Circuits, vol. 35, pp. 779-786, May 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 779-786
    • Rategh, H.1    Samavati, H.2    Lee, T.3
  • 14
    • 0025623849 scopus 로고
    • High-speed architectures for algorithms with quantizer loops
    • May
    • K.K. Parhi, "High-Speed architectures for algorithms with quantizer loops," IEEE International Symposium on Circuits and Systems, vol. 3, May 1990, pp. 2357-2360
    • (1990) IEEE International Symposium on Circuits and Systems , vol.3 , pp. 2357-2360
    • Parhi, K.K.1
  • 15
    • 0026171346 scopus 로고
    • Techniques for high-speed implementation of nonlinear cancellation
    • Jun
    • S. Kasturia and J.H. Winters, "Techniques for high-speed implementation of nonlinear cancellation," IEEE J. Selected Areas in Communications, vol. 9, no. 5, Jun 1991, pp. 711-717.
    • (1991) IEEE J. Selected Areas in Communications , vol.9 , Issue.5 , pp. 711-717
    • Kasturia, S.1    Winters, J.H.2
  • 16
    • 0029391812 scopus 로고
    • MMSE decision-feedback equalizers and coding-part I: Equalization results
    • October
    • J.M. Cioffi et al., "MMSE Decision-Feedback Equalizers and Coding-Part I: Equalization Results," IEEE Transactions on Communications, vol. 43, no. 10, October 1995, pp. 2582-2594.
    • (1995) IEEE Transactions on Communications , vol.43 , Issue.10 , pp. 2582-2594
    • Cioffi, J.M.1
  • 18
    • 32944464824 scopus 로고    scopus 로고
    • Performance specification of interconnects
    • B. Ahmad, "Performance Specification of Interconnects," DesignCon 2003.
    • DesignCon 2003
    • Ahmad, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.