A highly-parallel VLSI architecture for a list sphere detector

IEEE International Conference on Communications

Volumn 5, Issue , 2004, Pages 2720-2725

  Widdup, Benjamin ^a   Woodward, Graeme ^b   Knagge, Geoff ^c  

^a NOKIA RESEARCH CENTER   (United States)

^b LUCENT TECHNOLOGIES   (United States)

^c UNIVERSITY OF NEWCASTLE   (Australia)

Author keywords

Closest point search; Lattice decoding; MIMO; Multiuser detection (MUD); Parallel computing

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; DECODING; GAUSSIAN NOISE (ELECTRONIC); MATRIX ALGEBRA; PARALLEL PROCESSING SYSTEMS; PROBLEM SOLVING; VECTORS;

CLOSEST POINT SEARCH; LATTICE DECODING; MULTIPLE-IN MULTIPLE-OUTPUT (MIMO); MULTIUSER DETECTION (MUD);

VLSI CIRCUITS;

EID: 4143121248     PISSN: 05361486     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icc.2004.1313025     Document Type: Conference Paper

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