Electrical performance improvement in SiO2/HfSiO high-k gate stack for advanced low power device application

2004 International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2004, Pages 283-286

  Wang, M F ^a   Hou, T H ^a   Mai, K L ^a   Lim, P S ^a   Yao, L G ^a   Jin, Y ^a   Chen, S C ^a   Liang, M S ^a   Wu, W H ^b   Ou, S C ^b   Chen, M C ^b   Huang, T Y ^b  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; COMPOSITION; CURRENT DENSITY; DOPING (ADDITIVES); LEAKAGE CURRENTS; PLASMAS; SILICA; TRANSMISSION ELECTRON MICROSCOPY;

BASE OXIDES; DOPANTS; ELECTRICAL PERFORMANCE; NITRIDATION;

GATES (TRANSISTOR);

EID: 4143062606     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Masato. K et al., IEDM, p849, 2002.
2. T. Watanabe et al., VLSI, p 19, 2003.
3. C.W.Yang et al., IEE EL. Vol. 38, p1223, 2002.
4. T.H.Hou et al., IRPS, 2004.
5. C. Hobbs et al., VLSI, p9, 2003.