Performance pathologies in hardware transactional memory

IEEE Micro

Volumn 28, Issue 1, 2008, Pages 32-41

  Bobba, Jayaram ^a,c   Moore, Kevin E ^b   Volos, Haris ^a   Yen, Luke ^a   Hill, Mark D ^a   Swift, Michael M ^a   Wood, David A ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

^b SUN MICROSYSTEMS   (United States)

^c NONE   (United States)

Author keywords

Conflict detection; Conflict resolution; Hardware transactional memory; Pathology; Transactional memory; Version management

Indexed keywords

PATHOLOGY; SOFTWARE DESIGN; STORAGE ALLOCATION (COMPUTER);

CONFLICT DETECTION; CONFLICT RESOLUTION; HARDWARE TRANSACTIONAL MEMORY; VERSION MANAGEMENT;

PARALLEL PROGRAMMING;

EID: 41349098605     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2008.11     Document Type: Article

References (7)

1. M. Herlihy and J.E.B. Moss, "Transactional Memory: Architectural Support for Lock-Free Data Structures," Proc. 20th Ann. Int'l Symp. Computer Architecture (ISCA 93), ACM Press, 1993, pp. 289-300.
2. J.R. Larus and R. Rajwar, Transactional Memory, Morgan & Claypool Publishers, 2007.
3. W.N. Scherer III and M.L. Scott, "Advanced Contention Management for Dynamic Software Transactional Memory," Proc. 24th ACM Symp. Principles of Distributed Distributed Computing (PODC 05), ACM Press, 2005, pp. 240-248.
4. J. Bobba et al., "Performance Pathologies in Hardware Transactional Memory," Proc. 34th Ann. Int'l Symp. Computer Architecture (ISCA 07), ACM Press, 2007, pp. 81-91.
5. S.C. Woo et al., "The Splash-2 Programs: Characterization and Methodological Considerations," Proc. 22nd Ann. Int'l Symp. Computer Architecture (ISCA 95), IEEE CS Press, 1995, pp. 24-37.
6. P.S. Magnusson et al., "Simics: A Full System Simulation Platform," Computer, vol. 35, no. 2, Feb. 2002, pp. 50-58.
7. M.M.K. Martin et al., "Multifacet's General Execution-Driven Multiprocessor Simulator (GEMS) Toolset," Computer Architecture News Sept. 2005, pp. 92-99.