Lower resistance scaled metal contacts to silicide for advanced CMOS

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2006, Pages 116-117

  Topol, A ^a   Sheraw, C ^b   Wong, K ^b   Shao, X ^a   Knarr, R ^b   Rossnagel, S ^a   Yang, C C ^b   Baker O'Neal, B ^a   Simon, A ^b   Haran, B ^a   Li, Y ^b   Ouyang, C ^a   Allen, S ^b   Brodsky, C ^b   Cohen, S ^a   Deligianni, L ^a   Chen, X ^b   Deshpande, S ^b   Sung, C Y ^b   Ieong, M ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM RESEARCH   (United States)

Author keywords

CA; Contacts; Cu; Parasitics; Plugs; Resistance; W

Indexed keywords

CMOS INTEGRATED CIRCUITS; COPPER; ELECTRIC RESISTANCE; METALLIZING; TUNGSTEN;

METAL CONTACTS; PARASITIC RESISTANCE;

ELECTRIC CONTACTS;

EID: 41149178168     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. R. Islam, et al., VLSI Tech.2000;
2. M. Inohara, et al., IEDM 2001