25nm Short and narrow strained FDSOI with TiN/HfO2 gate stack

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2006, Pages 134-135

  Andrieu, F ^a   Dupre C ^b   Rochette, F ^b   Faynot, O ^a   Tosti, L ^a   Buj, C ^a   Rouchouze, E ^c   Casse M ^a   Ghyselen, B ^e   Cayrefourcq, I ^e   Brevard L ^a   Allain, F ^a   Barbe J C ^a   Cluzel, J ^a   Vandooren, A ^d   Denorme, S ^c   Ernst, T ^a   Fenouillet Beranger C ^a   Jahan, C ^a   Lafond, D ^a   Dansas, H ^a   Previtali, B ^a   Colonna, J P ^a   Grampeix, H ^a   Gaud, P ^a   Mazure C ^e   Deleonibus, S ^a   more..

^a CEA LETI   (France)

^b IMEP LAHC   (France)

^c STMICROELECTRONICS   (Italy)

^d FREESCALE SEMICONDUCTOR INC   (United States)

^e PARC TECHNOLOGIQUE DES FONTAINES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; MOS DEVICES; SILICON ON INSULATOR TECHNOLOGY; STRAIN MEASUREMENT; TITANIUM NITRIDE;

GATE STACKS; MECHANICAL SIMULATIONS;

GATES (TRANSISTOR);

EID: 41149094051     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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