Architectures for high dynamic range, high speed image sensor readout circuits

IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Volumn , Issue , 2006, Pages 36-41

  Kavusi, Sam ^a   Ghosh, Kunal ^a   Gamal, Abbas El ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC INTENSITY; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DETECTORS; DIGITAL IMAGE STORAGE; FOCAL PLANE ARRAYS; FOCUSING; IMAGE SENSORS; IMAGING SYSTEMS; INFRARED DEVICES; INFRARED IMAGING; INTEGRATED CIRCUITS; LEAST SQUARES APPROXIMATIONS; LSI CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; READOUT SYSTEMS; SEMICONDUCTING CADMIUM TELLURIDE; SENSORS; SIGNAL TO NOISE RATIO;

DYNAMIC RANGE (DR); DYNAMIC RANGE EXTENSION; FOCAL PLANES; HIGH DYNAMIC RANGE (HDR); HIGH DYNAMIC RANGE (HDR) IMAGING; HIGH LINEARITY; HIGH SNR; HIGH SPEEDS; IMAGING APPLICATIONS; INFRARED (IR); INTERNATIONAL CONFERENCES; IR FOCAL PLANE ARRAY (FPA); LEAST SQUARES FIT (LSF); LOW-POWER CONSUMPTION; PERFORMANCE REQUIREMENTS; READ-OUT CIRCUIT; SENSOR READOUT; SYSTEM ON CHIP (SOCS); VERY LARGE SCALE INTEGRATION (VLSI); VISIBLE RANGE;

THERMOGRAPHY (IMAGING);

EID: 40949092221     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2006.313269     Document Type: Conference Paper

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