In-depth electrical characterization of sub-45 nm fully depleted strained SOI MOSFETs with TiN/HfO2 gate stack

Solid-State Electronics

Volumn 52, Issue 4, 2008, Pages 489-497

  Feruglio, S ^a   Andrieu, F ^b   Faynot, O ^b   Ghibaudo, G ^a  

^a IMEP LAHC   (France)

^b CEA LETI   (France)

Author keywords

c MOSFET; FD SOI; Low field mobility; NCE; SCE; Strain; TiN HfO2 gate stack

Indexed keywords

ELECTRIC INSULATORS; GEOMETRY; MOSFET DEVICES; STRAIN MEASUREMENT;

GATE STACK; HOOKE'S LAW; MOBILITY ENHANCEMENT;

SILICON;

EID: 40749093733     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2007.10.039     Document Type: Article

References (20)

1. .
2. Eneman G, et al. VLSI Tech; 2005. p. 22.
3. Rim K, et al. IEDM Tech; 2003. p. 49.
4. Augendre E, et al. In: Proc ESSDERC, 2005. p. 301.
5. Thean AV-Y, et al. VLSI Tech; 2005. p. 134.
6. Lei R.Z., et al. Appl Phys Lett 87 (2005) 251926
7. Andrieu F, et al. IEEE Int SOI Conf; 2005. p. 223.
8. Andrieu F, et al. VLSI Tech; 2006. p. 134.
9. Ghyselen B., et al. Solid-State Electron 48 (2004) 1285
10. Ghibaudo G. Electron Lett 24 (1988) 543
11. Lime F, et al. In: ESSDERC Proc, 2005. p. 525.
12. Widiez J, et al. Silicon Nanoelectronics Workshop (satellite workshop of the VLSI Symposium), 2005.
13. Takagi S., et al. J Appl Phys 80 (1996) 1567
14. Cros A, et al. IEDL Tech; 2006. p. 439.
15. Welser JJ, et al. IEDM Tech; 1994. p. 373.
16. Wang E.X., et al. IEEE TED 53 (2006) 1840
17. Irisawa T, et al. IEDM Tech; 2006. p. 457.
18. Xiong W, et al. EDL, vol. 27; 2006. p. 612.
19. Daugé F., et al. Solid-State Electron 48 (2004) 535
20. Andrieu F, et al. VLSI Tech; 2007. p. 50.