A low-noise front-end circuit for 2D cMUT arrays

Proceedings - IEEE Ultrasonics Symposium

Volumn 1, Issue , 2006, Pages 689-692

  Guler, Ulkuhan ^a   Bozkurt, Ayhan ^a  

^a SABANCI UNIVERSITY   (Turkey)

Author keywords

[No Author keywords available]

Indexed keywords

2D ARRAYS; AMPLIFIER TOPOLOGY; ARRAY ELEMENTS; CADENCE SIMULATION; CMOS PROCESSS; CMOS TECHNOLOGY; FLIP-CHIP BONDING; FRACTIONAL BANDWIDTHS; FRONT END ELECTRONICS; FRONT-END CIRCUITS; HIGH VOLTAGE PULSERS; INPUT CURRENT; LOW NOISE; NMOS SWITCHES; NOISE FLOOR; OUTPUT IMPEDANCE; OUTPUT STAGES; PARASITIC CAPACITANCE; PULSE ECHOES; TRANSDUCER ELEMENTS; TRANSIMPEDANCE; UNIPOLAR PULSE; UNITY GAIN;

BANDWIDTH; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; IMAGE QUALITY; OPERATIONAL AMPLIFIERS; OPTIMIZATION; TRANSDUCERS;

FLIP CHIP DEVICES;

EID: 40549133343     PISSN: 10510117     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ULTSYM.2006.186     Document Type: Conference Paper

References (10)

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