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Volumn 155, Issue 4, 2008, Pages

CON-TACT planarization process of spin-on dielectrics for device fabrication

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS; SURFACE PROPERTIES; SURFACE TOPOGRAPHY;

EID: 40549120366     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.2834244     Document Type: Article
Times cited : (6)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.