A 4-way pipelined processing architecture for three-step search block-matching motion estimation

IEEE Transactions on Consumer Electronics

Volumn 50, Issue 2, 2004, Pages 674-681

  Jung, Sung Tae ^a   Lee, Sang Seol ^a  

^a Wonkwang University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

C (PROGRAMMING LANGUAGE); COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; PARALLEL ALGORITHMS; PIPELINE PROCESSING SYSTEMS;

BLOCK MATCHING; MEMORY PARTITIONING; PIPELINED PROCESSING ARCHITECTURE; THREE STEP SEARCH;

MOTION ESTIMATION;

EID: 4043180643     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2004.1309447     Document Type: Article

References (16)

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